Mobile Stations (MS), handheld devices, Base Stations (BS), Access Points (AP) and other devices of wireless communication systems may include transmitters to transmit Radio Frequency (RF) signals, e.g., within the range of 800 MHz-2.4 GHz. The transmitters may be linear transmitters, outphasing transmitters, and the like. Transmitters that are used to transmit continuous phase modulation signals, such as, for example, Continuous Phase Frequency Shift Keying (CPFSK) signals, Gaussian Minimum Shift Keying (GMSK) signals, 8-Phase-Shift-Keying (8-PSK), and the like, may include modulation chains of fractional-N (FN) synthesizers with built-in data modulators and Power Amplifiers. The total transfer function of the modulator is assumed to be 1:1 throughout operation. Unfortunately this assumption does not account for system instabilities, for example, tolerance variations of analog elements in the modulator circuit and the sensitivity of these elements to process and temperature. These instabilities may continually change parameters of a phase-locked loop (PLL) of the modulator during operation. For example, a bandwidth (BW) of the analog loop filter may change due to instability of capacitor values, gain of a phase detector (PD) may change due to instability of the current source, gain of a voltage controlled oscillator (VCO) may depend on its offset voltage, and frequency response of a FN closed loop may be strongly dependent on an offset frequency.
In order for the FN modulator to operate correctly, the PLL parameters should be measured or calculated for every channel hop, and the modulator should be re-calibrated in order to maintain a total transfer function of substantially 1:1 for the closed loop PLL. In devices that require channel hopping, a Pre-Distortion Filter (PDF) may be used to compensate for the changes in frequency response in the Fractional-N modulating scheme due to analog elements e.g. analog loop filters and VCO's found in a PLL. Conventionally, measurements are performed by a dedicated Analog to Digital Converter (ADC), which is an analog element as well and therefore contributes its own error and requires additional power beyond that required by the PLL.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.